Tackling the challenges of System level ESD: from efficient ICs ESD protection to system level predictive modeling
Résumé
This paper provides a review of the main tools that will allow developing a system efficient ESD design (SEED) approach. It starts with copying with the challenges of the narrowing of the ESD design window with temperature and high-voltage I/Os. We then present our behavioral modeling approach using VHDL-AMS and characterization tools such as TLP testing. Finally, the efficiency of the modeling methodology is illustrated with three case studies.
Origine | Fichiers produits par l'(les) auteur(s) |
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