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Communication Dans Un Congrès Année : 2013

Analog Encoded Neural Network for Power Management in MPSoC

Résumé

Encoded neural networks mix the principles of associative memories and error-correcting decoders. This paper introduces an analog implementation of this new type of network to manage the power distribution in Multiprocessor System-on-Chip (MPSoC). The proposed circuit has been designed for the 1V supply ST CMOS 65nm process, with a low complexity and low power consumption (less than 1% of the MPSoC power). Compared to a digital counterpart based on game theory, this analog solution consumes 6800 times less energy and reacts 4500 times faster. Thus, this analog circuit allows to fully exploiting DVFS circuits switching capabilities to continuously adapt the power distribution of an MPSoC.
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Dates et versions

hal-00843312 , version 1 (11-07-2013)

Identifiants

  • HAL Id : hal-00843312 , version 1

Citer

Benoit Larras, Bartosz Boguslawski, Cyril Lahuec, Matthieu Arzel, Fabrice Seguin, et al.. Analog Encoded Neural Network for Power Management in MPSoC. NEWCAS 2013 : proceedings of the 11th IEEE international NEWCAS conference, Jun 2013, Paris, France. pp.1 - 4. ⟨hal-00843312⟩
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