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Conference Papers Year : 2013

Programming and Timing Analysis of Parallel Programs on Multicores

Abstract

Multicore processors provide better power-performance trade-offs compared to single-core processors. Consequently, they are rapidly penetrating market segments which are both safety critical and hard real-time in nature. However, designing time-predictable embedded applications over multicores remains a considerable challenge. This paper proposes the ForeC language for the deterministic parallel programming of embedded applications on multicores. ForeC extends C with a minimal set of constructs adopted from synchronous languages. To guarantee the worst-case performance of ForeC programs, we offer a very precise reachability- based timing analyzer. To the best of our knowledge, this is the first attempt at the efficient and deterministic parallel programming of multicores using a synchronous C-variant. Experimentation with large multicore programs revealed an average over-estimation of only 2% for the computed worst-case execution times (WCETs). By reducing our representation of the programs state-space, we reduced the analysis time for the largest program (with 43, 695 reachable states) by a factor of 342, to only 7 seconds.
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Dates and versions

hal-00842402 , version 1 (09-07-2013)

Identifiers

  • HAL Id : hal-00842402 , version 1

Cite

Eugene Yip, Partha Roop, Morteza Biglari-Abhari, Alain Girault. Programming and Timing Analysis of Parallel Programs on Multicores. International Conference on Application of Concurrency to System Design, ACSD'13, Jul 2013, Barcelona, Spain. pp.167--176. ⟨hal-00842402⟩
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