The high cost for testing the analog blocks of a modern chip has sparked research efforts to replace the standard tests with less costly alternative tests. However, test engineers are rather reluctant to adopt alternative tests unless they are evaluated thoroughly before moving to production and they are proven to maintain test quality. This paper gives a comprehensive overview of statistical techniques based on density estimation for evaluating analog parametric test metrics during the test development phase. A large-scale simulation study is carried out for the first time with the aim to demonstrate these techniques in action.