Automatic Design Flow for Creating a Custom Multi-FPGA Board Netlist - Archive ouverte HAL
Communication Dans Un Congrès Année : 2013

Automatic Design Flow for Creating a Custom Multi-FPGA Board Netlist

Dates et versions

hal-00818279 , version 1 (26-04-2013)

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Citer

Qingshan Tang, Matthieu Tuna, Zied Marrakchi, Habib Mehrez. Automatic Design Flow for Creating a Custom Multi-FPGA Board Netlist. The 9th International Symposium on Applied Reconfigurable Computing, ARC 2013, Mar 2013, Los Angeles, United States. pp.221, ⟨10.1007/978-3-642-36812-7_24⟩. ⟨hal-00818279⟩
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