Modelling Power Consumption of the Intel SCC - Archive ouverte HAL
Conference Papers Year : 2012

Modelling Power Consumption of the Intel SCC

Abstract

The Intel SCC manycore processor supports energy-efficient computing by dynamic voltage and frequency scaling of cores on a fine-grained level. In order to enable the use of that feature in application-level energy optimizations, we report on experiments to measure power consumption in different situations. We process those measurements by a least-squares error analysis to derive the parameters of popular models for power consumption which are used on an algorithmic level. Thus, we provide a link between the worlds of hardware and high-level algorithmics.

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Dates and versions

hal-00719033 , version 1 (18-07-2012)

Identifiers

  • HAL Id : hal-00719033 , version 1

Cite

Patrick Cichowski, Jörg Keller, Christoph Kessler. Modelling Power Consumption of the Intel SCC. The 6th Many-core Applications Research Community (MARC) Symposium, Jul 2012, Toulouse, France. pp.46-51. ⟨hal-00719033⟩

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