The goal of this paper is to evaluate the SynDEx system-level CAD tool in order to estimate its usefulness for fast prototyping of image processing applications on a MIMD-DM architecture. This software can assist the programmer during the implementation of image processing applications in his constrained search for an efficient matching between algorithm and architecture. Two main conclusions were drawn from this work. First, the implementation of a connected component labeling algorithm on a multi-transputer architecture allowed us to quantify the gap between the estimated performances predicted by SynDEx and the effective performances measured on the generated executives. This gap - initially pointed out in the v3 release - is largely reduced in the v4. As part of this work, the v4 executive has been ported to T800 and T9000 targets. Second, the strong impact of the process granularity both on the easiness of the specification and the efficiency of the implementation has been evidenced. From a pragmatic point of view, this second conclusion clearly shows the advantages of a tool such as SynDEx, allowing to quickly evaluate these criterions at many granularity levels. From a more prospective point of view, the formalisation of some recurrent graph transformation rules, appearing when searching an optimal granularity, led us to the concept of algorithmic skeletons.