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Conference Papers Year : 2008

A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip

Abstract

In this paper we present a reconfigurable routing algorithm for a 2D-Mesh Network-on-Chip (NoC) dedicated to fault-tolerant, Massively Parallel Multi-Processors Systems on Chip (MP2-SoC). The routing algorithm can be dynamically reconfigured, to adapt to the modification of the micro-network topology caused by a faulty router. This algorithm has been implemented in a reconfigurable version of the DSPIN micro-network, and evaluated from the point of view of performance (penalty on the network saturation threshold), and cost (extra silicon area occupied by the reconfigurable version of the router).
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Dates and versions

hal-00591783 , version 1 (10-05-2011)

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Zhen Zhang, Alain Greiner, Sami Taktak. A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip. The 45th annual Design Automation Conference (DAC), Jun 2008, Anaheim, California, United States. pp.441--446, ⟨10.1145/1391469.1391584⟩. ⟨hal-00591783⟩
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