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Journal Articles IEEE Transactions on Circuits and Systems Year : 2011

Design and Modeling of a Neuro-Inspired Learning Circuit Using Nanotube-Based Memory Devices

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J.M. Retrouvey
  • Function : Author
G. Agnus
  • Function : Author
W. Zhao
  • Function : Author
D. Chabi
  • Function : Author
A. Filoramo
  • Function : Author
Vincent Derycke
  • Function : Author
  • PersonId : 837711
C. Gamrat
  • Function : Author
J.O. Klein
  • Function : Author

Abstract

We present an original method to implement neuro-inspired supervised learning for a synaptic array based on carbon nanotube devices. The device characteristics required to implement on chip learning within a crossbar of carbon nanotube field effect transistors (CNTFETs) as synaptic arrays were experimentally demonstrated and accurately modeled through a specific electrical compact model. We performed electrical simulations of learning for an array of 24 nanotube memory devices corresponding to a 3 input × 3 output neural layer that revealed successful learning of separable logic functions within very few epochs, even when a realistic variability of nanotube diameter was taken into account. Such a learning approach opens the way to the use of high-density synaptic arrays as generic logic blocks in configurable circuits.
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Dates and versions

hal-00584909 , version 1 (11-04-2011)

Identifiers

  • HAL Id : hal-00584909 , version 1

Cite

Si-Yu Liao, J.M. Retrouvey, G. Agnus, W. Zhao, Cristell Maneux, et al.. Design and Modeling of a Neuro-Inspired Learning Circuit Using Nanotube-Based Memory Devices. IEEE Transactions on Circuits and Systems, 2011, pp.1. ⟨hal-00584909⟩
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