Nanoelectronic circuit design flow is based on device description through the compact models available in the designer device library. We have developed a compact model for the Optically-Gated CNTFET by investigating the trapping-detrapping of electron effects in the device. This compact model represents an important enhancement of conventional CNTFET models already released. Especially, it includes the optical writing, the electrical reset, and the non-volatile memory effect of the device operations. Moreover, it describes also the influence of the device performances of the Schottcky barrier metal-CNT contact at the source and drain side. We also demonstrate that the simulation results obtained using this compact model, are in close agreement with preliminary experimental measurements. Furthermore, transient simulations predict the Schottky barrier impact on the memory operation.