Evaluation of the performances of a novel Punch Through Trench IGBT using a Si(1-x)Ge(x) N+ buffer layer by using finite elements simulations - Archive ouverte HAL Accéder directement au contenu
Communication Dans Un Congrès Année : 2010

Evaluation of the performances of a novel Punch Through Trench IGBT using a Si(1-x)Ge(x) N+ buffer layer by using finite elements simulations

Résumé

In this paper, a new Punch Through Trench IGBT using a Si(1-x)Gex N+ buffer layer is investigated by using two dimensional finite elements numerical simulations. The performances of this device are mainly obtained from the reduction of the turn-off switching time for a slight elevation of the on-state voltage. A study of the main static characteristics has been performed, particularly the relevance of the trade-off between the turn-off time and the on-state voltage, and its temperature dependency. At least, a comparison with a Carrier Storage Trench-gate Bipolar Transistor and a Trench Field Stop IGBT also including a Si(1-x)Ge(x) N+ buffer layer is done by the mean of trade off curves.
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Dates et versions

hal-00584133 , version 1 (07-04-2011)

Identifiants

  • HAL Id : hal-00584133 , version 1

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Stephane Azzopardi, Yassine Belmehdi, Florence Capy, Jean-Yves Delétage, Eric Woirgard. Evaluation of the performances of a novel Punch Through Trench IGBT using a Si(1-x)Ge(x) N+ buffer layer by using finite elements simulations. International Power Electronics Conference, Jun 2010, Japan. pp.xx-xx. ⟨hal-00584133⟩
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