The multimedia convergence in mobile phones is calling for new RF architectures. The Software Radio concept is claimed to be a solution toward low power, low cost reconfigurable systems. It is characterized by a one chip solution, able to handle any RF standards. It receives any RF signals in a 0 to 5GHz frequency range. Such a solution is nowadays a dream in the case of handsets. Huge technological constraints remain on Analog to Digital Conversion which has to be brought closer and closer to the antenna. As technical bottlenecks are expected to be unsolved in the next 15 years, disruptive RF receiver architectures are found to address the Software Radio concept. Analog signal processing is one of the clues of this issue. This presentation will mainly focus on the design of a wide band, low power, and low cost analog signal processor. The Sampled Analog Signal Processor (SASP) is chosen to interface the antenna and the ADC in a receiver chain. It relaxes Analog to Digital Conversion constraints thanks to the principle of a reconfigurable frequency translation. It is displayed by analog voltage samples and discrete analog operations performed at RF frequencies. A prototype of the SASP, its measurements and further applications will be exhibited