CMOS Low-Noise Amplifier Linearization through Body Biasing - Archive ouverte HAL
Communication Dans Un Congrès Année : 2009

CMOS Low-Noise Amplifier Linearization through Body Biasing

Résumé

A new linearization technique for CMOS low-noise amplifiers (LNAs) based on body biasing is presented. Analysis and measurement results show that the third order intercept point (IIP3) can be optimized using a proper body bias. The LNA, intended for wireless sensor network applications in the 2.4GHz ISM Band, is implemented in a 0.13μm CMOS technology. It achieves a nominal gain of 12.6dB, 4.2dB of noise figure (NF), and -4dBm of IIP3 while drawing 3.4mA from a 1V supply. An 11dBm peak in IIP3 occurs when adjusting the bulk to source voltage to -0.55 V, wherein the gain and NF reach 9dB and 6.2dB respectively, for a 2mW overall power consumption.

Domaines

Electronique
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Dates et versions

hal-00448850 , version 1 (20-01-2010)

Identifiants

  • HAL Id : hal-00448850 , version 1

Citer

Aya Mabrouki, Thierry Taris, Yann Deval, Jean-Baptiste Begueret. CMOS Low-Noise Amplifier Linearization through Body Biasing. IEEE International Symposium on Radio-Frequency Integration Technology (RFIT), Dec 2009, Singapour, Singapore. pp.123-127. ⟨hal-00448850⟩
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