A Practical Approach to the Formal Verification of SoCs with Symbolic Model-Checking
Résumé
The successful application of model-checking to industrial designs calls for a minimal set of efficiency criteria. This work addresses these issues, based on the linear-time model-checking verification of an instruction cache controller designed by ST Microelectronics.
Origine : Fichiers produits par l'(les) auteur(s)
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