HLS Design Flow for Multimode IP Generation Under Multiple Constraints - Archive ouverte HAL
Communication Dans Un Congrès Année : 2007

HLS Design Flow for Multimode IP Generation Under Multiple Constraints

Résumé

In a mobile society, more and more devices need to continuously adapt to changing environments. Such mode switches can be smoothly done in software using a general purpose or digital signal processor though hardware components can cope with throughput and power constraints. In this paper we propose a methodology to implement multiple configuration (or mode) and multi-constraint systems into a single circuit using conventional hardware technologies. Results show the interest of the methodology.
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Dates et versions

hal-00400051 , version 1 (29-06-2009)

Identifiants

  • HAL Id : hal-00400051 , version 1

Citer

Bertrand Le Gal, Emmanuel Casseau, Lilian Bossuet, S. Khan. HLS Design Flow for Multimode IP Generation Under Multiple Constraints. IEEE International Conference on Electronics, Circuits and Systems, Dec 2007, Marrakech, Morocco. pp.000. ⟨hal-00400051⟩
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