High-Speed A/D & D/A Conversion: A Survey - Archive ouverte HAL Accéder directement au contenu
Communication Dans Un Congrès Année : 2008

High-Speed A/D & D/A Conversion: A Survey

Résumé

This paper deals with general discussion over high speed data converter architectures. Nowadays, more and more researches are focused on the ability to design transceivers able to manage digital data as soon as possible right behind the antenna. These so-called Software Defined Radio architectures are one of the easiest ways to design a receiver with low time-to-market impact. Furthermore, most of the recent standards impose either very high frequency ranges, large bandwidth signals and numerous number of bits. Indeed, different topologies of analog-to-digital and digital-to-analog converters are discussed, keeping in mind the very high frequency purpose. To conclude this paper, two designs are presented: a wideband 3-bit 4Gsps Flash converter and a narrowband 12-bit 4Gsps Continuous-Time Delta-Sigma converter.

Domaines

Electronique
Fichier non déposé

Dates et versions

hal-00333512 , version 1 (23-10-2008)

Identifiants

  • HAL Id : hal-00333512 , version 1

Citer

Jean-Baptiste Begueret, André Mariano, Dominique Dallet. High-Speed A/D & D/A Conversion: A Survey. Bipolar / BiCMOS Circuits and Technology Meeting, Oct 2008, Monterey, United States. pp.260-264. ⟨hal-00333512⟩
56 Consultations
0 Téléchargements

Partager

Gmail Facebook X LinkedIn More