The next generation of mobile terminals is faced with the emergence of the Software Radio concept. The Software Radio concept aims at designing a reconfigurable radio architecture accepting any cellular or non-cellular standards working in the 0-5 GHz frequency range. But technical challenges have to be overcome in order to address this concept. The main bottleneck is the Analog to Digital conversion which cannot be done at Radio Frequencies, at an acceptable resolution and at an acceptable level of power consumption. The idea proposed here was to interface an analog pre-processing circuit between the antenna and a Digital Signal Processor (DSP). It pre-conditions the RF signal. It uses the principle of an analog Fast Fourier Transform (FFT) to carry out basic functions with high accuracy in a low-cost technology like 65nm CMOS. This paper presents the schematics, the design and the behavioral simulations of this analog discrete-time device which gives the hardware flexibility required for a cognitive radio component.