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Communication Dans Un Congrès IFIP International Conference On Very Large Scale Integration (VLSI SOC'07), Année : 2007

Qualification of Behavioral Level Design Validation for AMS&RF SoCs

Résumé

The expansion of Wireless Systems-on-Chip leads to a rapid development of design and manufacturing methods. In this paper, the test vectors used for design validation of AMS & RF SoCs are evaluated and optimized. This qualification is based on a fault injection method. A fault model based on variation of behavioral parameters and a related qualification metric are proposed. This approach is used in the receiver's design of a WCDMA transceiver. A test set defined by verification engineers during the validation of this system is qualified and optimized. Then, this test set is compared with a second test set automatically generated by a developed tool. Keys words: Test Qualification, characterization, design validation, AMS & RF SoCs, VHDL-AMS, behavioral modeling, fault injection.
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Dates et versions

hal-00250426 , version 1 (12-02-2008)

Identifiants

  • HAL Id : hal-00250426 , version 1

Citer

Yves Joannon, Vincent Beroulle, Chantal Robach, Smail Tedjini, Jean-Louis Carbonero. Qualification of Behavioral Level Design Validation for AMS&RF SoCs. VLSI SOC'07, Oct 2007, Atlanta, United States. pp.100 - 106. ⟨hal-00250426⟩

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