Simul'Elec, a Delphi written simulator for power Electrical Engineering, using VHDL-AMS modeling - Archive ouverte HAL
Communication Dans Un Congrès Année : 2007

Simul'Elec, a Delphi written simulator for power Electrical Engineering, using VHDL-AMS modeling

Fabien Legrand
  • Fonction : Auteur
Maria Azurmendi
  • Fonction : Auteur
Fernando Martin
  • Fonction : Auteur
Luis Fontan
  • Fonction : Auteur
Jean-Jacques Charlot
  • Fonction : Auteur
Nadine Couture

Résumé

Few simulators are designed for power electrical engineering and they should be usually used by high skilled users. Simul'Elec is an electrical simulator, part of an electrical CAD software. This simulator is designed with the focus of giving access to simulation to electrical CAD users usually not very familiar with simulation tools. It provides a graphical modeling interface. This friendly simulator written in Delphi integrates graphical user interface to generate VHDL-AMS models and a compiler to simulate its.
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Dates et versions

hal-00177333 , version 1 (07-10-2007)

Identifiants

  • HAL Id : hal-00177333 , version 1

Citer

Fabien Legrand, Maria Azurmendi, Fernando Martin, Luis Fontan, Jean-Jacques Charlot, et al.. Simul'Elec, a Delphi written simulator for power Electrical Engineering, using VHDL-AMS modeling. Behavioral Modeling and Simulation Workshop, 2007. (BMAS'07). IEEE International, Sep 2007, San Jose, United States. pp.94-99. ⟨hal-00177333⟩

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