Simulation of assembly generated constraints during SMT processing and size optimisation of the capacitors by design of experiments - Archive ouverte HAL
Article Dans Une Revue HYBRID CIRCUITS Année : 1993

Simulation of assembly generated constraints during SMT processing and size optimisation of the capacitors by design of experiments

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Acoustique [physics.class-ph]

Yannick Deshayes  : Connectez-vous pour contacter le contributeur

https://hal.science/hal-00164908

Soumis le : mardi 24 juillet 2007-11:49:19

Dernière modification le : lundi 5 juin 2023-16:52:11

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hal-00164908 , version 1 (24-07-2007)

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  • HAL Id : hal-00164908 , version 1

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Y. Ousten, L. Bechou, N. Xiong. Simulation of assembly generated constraints during SMT processing and size optimisation of the capacitors by design of experiments. HYBRID CIRCUITS, 1993, 32, pp. 26-32. ⟨hal-00164908⟩

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