Abstract Synthesis of Turbo Decoder Elements onto Reconfigurable Circuit - Archive ouverte HAL
Communication Dans Un Congrès Année : 2005

Abstract Synthesis of Turbo Decoder Elements onto Reconfigurable Circuit

Résumé

In this paper, an original method for the synthesis of one part of block turbo decoder is presented. From the abstract specifications, Madeo framework proposes an object oriented method to synthesize them onto FPGA structures. The method relies on the capability of Madeo framework to manage high level expressions. The paper shows how this can be achieved in a case of turbo decoder, especially for the syndrome computation and least reliable symbols search. This kind of application is a good candidate for Madeo because it deals with non-standard arithmetics (Galois field GF(128)). The synthesis results using this approach are compared to ones from a more traditional design, using SystemC.
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Dates et versions

hal-00079265 , version 1 (12-06-2006)

Identifiants

  • HAL Id : hal-00079265 , version 1

Citer

Caaliph Andriamisaina, Dezan Catherine, Christophe Jego, Pottier Bernard. Abstract Synthesis of Turbo Decoder Elements onto Reconfigurable Circuit. 2005, pp.263-264. ⟨hal-00079265⟩

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