A Formal Method for Hardware IP Design and Integration under I/O and Timing Constraints - Archive ouverte HAL
Communication Dans Un Congrès Année : 2004

A Formal Method for Hardware IP Design and Integration under I/O and Timing Constraints

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Dates et versions

hal-00077860 , version 1 (01-06-2006)

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  • HAL Id : hal-00077860 , version 1

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Philippe Coussy, E. Martin. A Formal Method for Hardware IP Design and Integration under I/O and Timing Constraints. PhD Forum of the IEEE International Conference on Design Automation and Test in Europe (DATE), 2004, Paris, France. ⟨hal-00077860⟩
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