Communication Dans Un Congrès Année : 2025

High-performance computing architecture exploration with stage-enhanced Bayesian optimization

Résumé

The emergence of new applications in highperformance computing is driving the need for more efficient computing machines. As supercomputer architectures become increasingly complex, the combinatorial explosion of design spaces and the time-consuming nature of design simulations lead to challenging design space exploration problems. This work introduces an automated search framework to achieve powerperformance-area efficient Arm Neoverse V1 processor designs. Based on multi-objective Bayesian optimization, we propose a new exploration algorithm named SEBO by enhancing the three main stages of the optimization. Experimental results show that SEBO can not only compete with the top state-of-the-art baseline algorithms, but also outperforms them in terms of the quality and diversity of the returned Pareto-optimal designs.

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cea-05272034 , version 1 (22-09-2025)

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Vincent Fu, Mohamed Benazouz, Lilia Zaourar, Alix Munier-Kordon. High-performance computing architecture exploration with stage-enhanced Bayesian optimization. DAC 2025 - 62nd ACM/IEEE Design Automation Conference, Jun 2025, San Francisco, CA, United States. pp.1-7, ⟨10.1109/DAC63849.2025.11132525⟩. ⟨cea-05272034⟩
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