Hierarchical Content Stores in High-speed ICN Routers: Emulation and Prototype Implementation - Archive ouverte HAL Access content directly
Conference Papers Year : 2015

Hierarchical Content Stores in High-speed ICN Routers: Emulation and Prototype Implementation

(1) , (1) , (1) , (1) , (2) , (3, 1) , (1, 4, 5)
1
2
3
4
5

Abstract

Recent work motivates the design of Information-centric rou-ters that make use of hierarchies of memory to jointly scale in the size and speed of content stores. The present paper advances this understanding by (i) instantiating a general purpose two-layer packet-level caching system, (ii) investigating the solution design space via emulation, and (iii) introducing a proof-of-concept prototype. The emulation-based study reveals insights about the broad design space, the expected impact of workload, and gains due to multi-threaded execution. The full-blown system prototype experimentally confirms that, by exploiting both DRAM and SSD memory technologies, ICN routers can sustain cache operations in excess of 10Gbps running on off-the-shelf hardware.
Not file

Dates and versions

hal-01279356 , version 1 (25-02-2016)

Identifiers

  • HAL Id : hal-01279356 , version 1

Cite

Rodrigo Mansilha, Lorenzo Saino, Marinho Barcellos, Massimo Gallo, E. Leonardi, et al.. Hierarchical Content Stores in High-speed ICN Routers: Emulation and Prototype Implementation. ACM SIGCOMM Conference on Information-Centric Networking (ICN'15), Sep 2015, San Francisco, United States. ⟨hal-01279356⟩
354 View
0 Download

Share

Gmail Facebook Twitter LinkedIn More