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Keywords : Real-time systems

A Comparative Study of the Precision of Stack Cache Occupancy Analyses

Naji Amine , Florian Brandner
9th Junior Researcher Workshop on Real-Time Computing, Nov 2015, Lille, France. pp.13-16
Conference papers hal-02287276v1

Worst-Case Execution Time Analysis of Predicated Architectures

Florian Brandner , Naji Amine
Workshop on Worst-Case Execution Time Analysis, Jun 2017, Dubrovnik, Croatia. pp.1-13, ⟨10.4230/OASIcs.WCET.2017.6⟩
Conference papers hal-02288493v1

A Comparative Study of the Precision of Stack Cache Occupancy Analyses

Amine Naji , Florian Brandner
9th Junior Researcher Workshop on Real-Time Computing, Julien Forget, Nov 2015, Lille, France. pp.4
Conference papers hal-01246343v1

Dynamic Arbitration of Memory Requests with TDM-like Guarantees

Farouk Hebbache , Mathieu Jan , Florian Brandner , Laurent Pautet
Workshop on Compositional Theory and Technology for Real-Time Embedded Systems, Dec 2017, Paris, France
Conference papers hal-02287739v1

Scheduling algorithms to reduce the static energy consumption of real-time systems

V. Legout , M. Jan , Laurent Pautet
Experiments in Fluids, 2015, 56 (3), pp.153-191. ⟨10.1007/s11241-014-9207-7⟩
Journal articles cea-01846864v1
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Litmus-RT plugins for global static scheduling of mixed criticality systems

Laurent Pautet , Thomas Robert , Samuel Tardieu
Journal of Systems Architecture, 2021, 118, pp.102221. ⟨10.1016/j.sysarc.2021.102221⟩
Journal articles hal-03276250v1
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Work-conserving dynamic TDM-based memory arbitration for multi-criticality real-time systems

Farouk Hebbache
Hardware Architecture [cs.AR]. Université Paris Saclay (COmUE), 2019. English. ⟨NNT : 2019SACLT044⟩
Theses tel-02494421v1

Eager Stack Cache Memory Transfers

Naji Amine , Florian Brandner
Workshop on Worst-Case Execution Time Analysis, Jul 2016, Toulouse, France
Conference papers hal-02287376v1
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Deployment of mixed criticality and data driven systems on multi-cores architectures

Roberto Medina
Embedded Systems. Université Paris-Saclay, 2019. English. ⟨NNT : 2019SACLT004⟩
Theses tel-02086680v1
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Formal semantics of behavior specifications in the architecture analysis and design language standard

Loïc Besnard , Thierry Gautier , Paul Le Guernic , Clément Guy , Jean-Pierre Talpin et al.
[Research Report] RR-8950, INRIA. 2016, pp.30 - 39
Reports hal-01419973v1
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COntinuuM, a CO-modelling Methodology for the Integration of Real-time Architecture Models

I Perseil , Laurent Pautet
Embedded Real Time Software and Systems (ERTS2008), Jan 2008, Toulouse, France
Conference papers hal-02270295v1

Handling criticality mode change in time-triggered systems through linear programming

M. Jan , L. Zaourar , V. Legout , Laurent Pautet
Ada User Journal, 2014, 35 (2), pp.133-137
Journal articles cea-01844456v1

Efficient Context Switching for the Stack Cache

Sahar Abbaspour , Florian Brandner , Amine Naji , Mathieu Jan
Proceedings of the 23rd International Conference on Real Time and Networks Systems, Julien Forget (Université de Lille, France), Nov 2015, Lille, France. pp.10, ⟨10.1145/2834848.2834861⟩
Conference papers hal-01246348v1
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Arbitration-Induced Preemption Delays

Farouk Hebbache , Florian Brandner , Mathieu Jan , Laurent Pautet
31st Euromicro Conference on Real-Time Systems, Jul 2019, Stuttgart, Germany. ⟨10.4230/LIPIcs.ECRTS.2019.19⟩
Conference papers hal-02447339v1
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Configuration et Reconfiguration des Systèmes Temps-Reél Répartis Embarqués Critiques et Adaptatifs

Etienne Borde
Systèmes embarqués. Télécom ParisTech, 2009. Français. ⟨NNT : ⟩
Theses pastel-00563947v1